1. Field of the Invention
Embodiments of the present invention relate to mixer circuits for use in communication systems, and in preferred embodiments to a passive mixer circuit having ultra-high linearity for use in wireless communication systems and to wireless communication systems that employ such a passive mixer circuit.
2. Description of Related Art
Mixers are used in transceivers in many commercial wireless applications, including wireless Local Area Networks (LANs), wireless personal communication devices including radios, cellular telephones, mobile cordless telephones, Personal Digital Assistants (PDAs), Personal Computer Memory Card International Association (PCMCIA) computer interface applications, telemetry systems, global positioning systems (GPS) and other radio frequency (RF) devices.
In such applications, the transmitted and received signal is an RF signal. The RF signal consists of a baseband signal modulated on a carrier frequency signal. Because the baseband signal is a relatively low frequency signal, the baseband signal is modulated onto the higher frequency carrier signal before transmission. Conversely, because the carrier frequency is a relatively high frequency signal, the RF signal is down-converted to a lower frequency upon reception and before further processing.
Conventional heterodyne receivers down convert a radio-frequency (RF) signal to a baseband signal using one or more intermediate stages in which the RF signal is converted to one or more intermediate-frequency signals, lower than the RF signal, until the base-band frequency is reached. A heterodyne transmitter generates a higher frequency RF signal from a baseband signal using one or more intermediate stages to up-convert the frequency.
A homodyne or “direct conversion” receiver directly down-converts radio-frequency (RF) signals to baseband frequency without intermediate stages. Analogously a direct conversion transmitter up-converts from base-band to RF without intermediate stages. Direct conversion transceivers are particularly useful in multi-band transceivers, because of the elimination of the intermediate frequency passband filtering components and the resulting space savings. In addition, in direct conversion transceivers there is a corresponding reduction in the complexity of the transceivers.
Mixers are used in transceivers to convert a signal from a low frequency to a high frequency or a high frequency to a low frequency by mixing the signal with a local oscillator signal. The local oscillator frequency can be above or below the frequency of the desired signal to produce a sum and a difference frequency, one of which is the frequency of interest. There are many types of mixers including unbalanced, single and double balanced mixers. Mixers may be further categorized as passive or active.
Conventional mixers are implemented in various semiconductor technologies such as silicon and gallium arsenide with diodes, bipolar junction transistors (BJT), field effect transistors (FET), or other variations of these types. Increasingly, integrated circuits (ICs) having complementary metal-oxide semiconductor (CMOS) technology are being used in radio frequency (RF) circuits, including radio frequency (RF) circuits for wireless (LAN) networks.
CMOS technology is making lower cost, smaller ICs possible in wireless applications and facilitates single-chip implementation of baseband processing and RF transceiver circuits. RF CMOS transceiver ICs are increasingly being used in LAN networks using the 5 GHz waveband, under the IEEE802.11a standard. For example, Atheros Communications™ manufactures the AR5000 which is described as a complete 5 GHz “Radio-on-a-Chip” (RoC) and provides full wireless LAN connectivity based on the IEEE 802.11a 5 GHz standard. This standard provides 5 GHz wireless transfer speeds of 54 megabits per second (Mbps), thus allowing for high speed wireless transfer of large amounts of content.
Thus, increasingly, direct conversion transceivers implemented with CMOS technology are being used in such wireless communication applications. Mixers used in direct conversion transceivers generally require low flicker (1/f) noise. The 1/f noise is an intrinsic noise phenomenon found in semiconductor devices. Active mixer circuits implemented in CMOS generally suffer from 1/f problems. Passive mixer circuits implemented in CMOS, on the other hand, generally exhibit a low noise figure. Thus, it is advantageous to use passive mixer circuits in direct conversion transceivers implemented with CMOS technology due to the improved noise figure.
A conventional CMOS implemented passive mixer circuit used in a receiver is shown in FIG. 1. In FIG. 1, the RF input signal to be down converted is fed into input terminals 101 and 103 and through capacitors 112 and 114 to the source terminals of the NMOS field effect transistor (FET) differential pairs 102 (M1), 104 (M2) and 106 (M3), 108 (M4) of passive mixer circuit 100. The local oscillator signal (LO) to be mixed with the RF signal is connected to the gate terminals of FETs 102 and 108. The 180-degree phase shifted or “complementary” local oscillator signal (LOC) is connected to the gate terminals of FETs 104 and 106. A transformer or other phase shifting device (not shown) can provide this phase shift input. DC power and biasing are provided to the differential pairs 102, 104 and 106, 108 in a manner known in the art.
Because the differential pairs 102, 104 and 106, 108 are driven by local oscillator signals that are 180 degrees out of phase, only one of FET pair 102, 108 or FET pair 104, 106 is on at a given time. Passive mixer circuit 100 multiplies the incoming signal RF-in with the local oscillator signal, producing sum and difference frequencies.
High linearity performance is required in mixer circuits used in wireless communication applications. Passive mixer circuits such as the one shown in FIG. 1 generally have poor linearity performance. One parameter by which the linearity performance of a mixer may be defined is the input third-order intercept point (IIP3) of the mixer. The IIP3 is a measure of third-order non-linearity in the transfer function of a circuit. Due to the third-order non-linearity, output third-order intermodulation products (IM3) may be generated which may distort the desired output signal. The power of the desired signal at the output of a linear circuit increases linearly with the input power of the circuit. However, the power of the output IM3 increases with the cube of the input power. Stated in another way, every 1 dB increase in the input RF signal results in a 1 dB increase in the output RF signal, but a 3 dB increase in the third order products. The IIP3 is the RF signal input power level at which the power of the desired signal at the output of a circuit is equal to the power of the output IM3.
A representative plot 200 of a first order (fundamental) RF signal output 202 and third-order intermodulation products (IM3) 204 versus an RF signal input is shown in FIG. 2. Horizontal axis 206 represents the power of the RF input signal measured in dBm (decibels referenced to a power of 1 milliwatt). Vertical axis 208 represents the power of the first order RF signal output and third-order intermodulation products (IM3) in dBm. It can be seen from FIG. 2 that the IIP3 216 is an input power level where the desired RF output signal and the IM3become equal in amplitude. IIP3 216 is a theoretical value since saturation occurs before the IIP3 point is reached. IIP3 216 may be obtained by extrapolating from the RF signal output 202 and third-order intermodulation products (IM3) 204 plots (as shown by extrapolated lines 212 and 214) until the two extrapolated lines 212 and 214 meet, as shown by point 210.
Thus, it can be seen from plot 200 that the IM3 204 increases with increasing RF input signal power until the RF input signal power reaches IIP3 216 on the horizontal axis of representative plot 200. At IIP3 216, the IM3 would theoretically be equal to the desired RF signal output 202. It can also be seen from plot 200 that the linearity performance of a particular mixer may be improved by increasing the IIP3, i.e. by increasing the RF signal input power level at which IM3 is equal to the desired RF output signal.
One reason that increased RF input signal power causes increased distortion (such as IM3) can be seen in FIG. 3. FIG. 3 shows a plot 300 of a LO signal 302 and an RF-in signal 304 as applied to FET 102 (shown in FIG. 1). For the sake of simplicity, the operation of only one FET in mixer circuit 100 is described. However, the other three FETs operate in a similar manner. The horizontal axes of the LO signal 302 and the RF-in signal 304 plots, represent time t. The vertical axes of the LO signal and the RF-in signal plots represent signal voltage amplitude. Plot 300 also includes the gate to source voltage (Vgs) 306 (vertical axis) of FET 102 at time t (horizontal axis). When Vgs 306 for FET 102 reaches a defined turn-on threshold voltage 308, FET 102 will turn on. Similarly, when Vgs 306 for FET 102 reaches a defined turn-off threshold voltage 310, FET 102 will turn off. The Vgs of FET 102 may be defined as LO−RF-in. Thus, at any time t, the Vgs 306 of FET 102 will be equal to the amplitude of the LO signal 302 minus the amplitude of the RF-in signal 304.
In general, an LO signal is designed to be much larger than an RF-in signal. Thus, when an RF-in signal amplitude is low, a Vgs of a FET will essentially be determined by the voltage amplitude of the LO signal and the Vgs waveform of the FET will essentially track the LO signal waveform. However, for a larger amplitude RF-in signal such as RF-in signal 304 shown in FIG. 3, the amplitude of the Vgs 306 of FET 102 becomes more dependent on the RF-in signal 304 amplitude at any time t. Thus, as the higher amplitude RF-in signal 304 varies in amplitude over time t, the Vgs 306 of FET 102, and thus the on and off times of FET 102, become time-varying and non-symmetrical during the positive and negative half cycles of the RF-in signal 304.
This can be seen clearly from the plot of Vgs 306 in FIG. 3. During the first positive half cycle of the RF-in signal 304 (t1), the LO signal 302 is positive and FET 102 is only turned on for the portion of t1 where LO−RF-in is equal to or greater than the defined turn-on threshold voltage 308. Thus, FET 102 is turned on for only a short portion of t1. Similarly, during the first negative half cycle of the RF-in signal 304 (t2), the LO signal 302 is positive and FET 102 is turned on for the portion of t1 where LO−RF-in is equal to or greater than the defined turn-on threshold voltage 308. Thus, FET 102 is turned on for a long portion of t2 due to the fact that the RF-in signal 304 has a large negative value during t2.
During the second positive half cycle of the RF-in signal 304 (t3), the LO signal 302 is negative and FET 102 is turned off for the portion of t3 where LO−RF-in is equal to or less than the defined turn-off threshold voltage 310. Thus, FET 102 is turned off for a long portion of t3. Similarly, during the second negative half cycle of the RF-in signal 304 (t4), the LO signal 302 is negative and FET 102 is only turned off for the portion of t4 where LO−RF-in is equal to or less than the defined turn-off threshold voltage 310. Thus, FET 102 is turned off for only a short portion of t4.
Because of this dependency of the Vgs 306 of FET 102 on the time varying amplitude of the larger RF-in signal 304, the stage prior to passive mixer circuit 100 will encounter variations in loading. As a result, the output baseband signal at output terminals 105 and 107 will be nonlinear, as shown in FIG. 4.
Many efforts have been made to improve the linearity performance of mixer circuits used in communication systems. For example, a mixer circuit for improving linearity performance in a transceiver requiring an intermediate frequency is disclosed in U.S. Pat. No. 6,064,872 entitled “Totem Pole Mixer Having Grounded Serially Connected Stacked FET Pair”. A high dynamic range mixer apparatus and mixing method are described where a wide high dynamic range is achieved in part due to the use of a series pair of switching devices that are matched so as to reduce nonlinearity distortion. An active mixer circuit for improving the intermodulation (IM) performance in a receiver requiring an intermediate frequency is disclosed in U.S. Pat. No. 6,140,849. An active double-balanced mixer with embedded linearization amplifiers includes a feedback circuit, along with a pair of operational amplifiers, for the purpose of improving the IM performance. Another active mixer circuit for use in a direct conversion receiver which provides reduced even order distortion is disclosed in U.S. Pat. No. 6,021,323 entitled “Direct Conversion Receiver With Reduced Even Order Distortion”. The active mixer circuit includes a compensating differential amplifier which injects equal amplitude opposite phase currents with respect to even order distortion currents. Another mixer circuit which provides intermodulation and harmonic distortion suppression is disclosed in U.S. Pat. No. 6,144,236 entitled “Structure And Method For Super FET Mixer Having Logic-Gate Generated FET Square-Wave Switching Signal”. A triple-balanced passive reflection FET mixer is disclosed having a substantially square wave switching waveform derived or regenerated from a sinusoidal local oscillator waveform.
However, there remains a need for an easily implemented passive mixer circuit for reducing or substantially eliminating nonlinear distortion for use in a direct conversion transceiver employed in high speed wireless communication applications which is satisfied by the inventive ultra-high linearity CMOS passive mixer circuit described hereinafter.